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<h1>/home/mandrake/rpm/BUILD/sc68-2.2.1/emu68/macro68.h</h1><a href="macro68_8h.html">Go to the documentation of this file.</a><div class="fragment"><pre class="fragment"><a name="l00001"></a>00001
<a name="l00016"></a>00016 <span class="comment">/* Copyright (C) 1998-2001 Ben(jamin) Gerard */</span>
<a name="l00017"></a>00017
<a name="l00018"></a>00018 <span class="preprocessor">#ifndef _MACRO68_H_</span>
<a name="l00019"></a>00019 <span class="preprocessor"></span><span class="preprocessor">#define _MACRO68_H_</span>
<a name="l00020"></a>00020 <span class="preprocessor"></span>
<a name="l00021"></a>00021 <span class="preprocessor">#include "<a class="code" href="srdef68_8h.html" title="Status Register (SR) definitions.">emu68/srdef68.h</a>"</span>
<a name="l00022"></a>00022 <span class="preprocessor">#include "<a class="code" href="excep68_8h.html" title="68k exception vector definitions.">emu68/excep68.h</a>"</span>
<a name="l00023"></a>00023
<a name="l00024"></a>00024 <span class="preprocessor">#ifdef __cplusplus</span>
<a name="l00025"></a>00025 <span class="preprocessor"></span><span class="keyword">extern</span> <span class="stringliteral">"C"</span> {
<a name="l00026"></a>00026 <span class="preprocessor">#endif</span>
<a name="l00027"></a>00027 <span class="preprocessor"></span>
<a name="l00028"></a>00028 <span class="preprocessor">#ifndef EMU68CYCLE</span>
<a name="l00029"></a><a class="code" href="macro68_8h.html#6854f97787c2c6fc81de10084518e83b">00029</a> <span class="preprocessor"></span><span class="preprocessor"># define ADDCYCLE(N) </span>
<a name="l00030"></a><a class="code" href="macro68_8h.html#7f28a46e4d01a2a3aceaa1439909a969">00030</a> <span class="preprocessor"># define SETCYCLE(N) </span>
<a name="l00031"></a>00031 <span class="preprocessor">#else</span>
<a name="l00032"></a>00032 <span class="preprocessor"></span><span class="preprocessor"># define ADDCYCLE(N) reg68.cycle += (N) </span>
<a name="l00033"></a>00033 <span class="preprocessor"># define SETCYCLE(N) reg68.cycle = (N) </span>
<a name="l00034"></a>00034 <span class="preprocessor">#endif</span>
<a name="l00035"></a>00035 <span class="preprocessor"></span>
<a name="l00041"></a><a class="code" href="macro68_8h.html#20a4f9d1130f259f69dab9c2b32a78e1">00041</a> <span class="preprocessor">#define EXCEPTION(VECTOR,LVL) \</span>
<a name="l00042"></a>00042 <span class="preprocessor">{ \</span>
<a name="l00043"></a>00043 <span class="preprocessor"> pushl(reg68.pc); pushw(reg68.sr); \</span>
<a name="l00044"></a>00044 <span class="preprocessor"> reg68.sr &= 0x70FF; \</span>
<a name="l00045"></a>00045 <span class="preprocessor"> reg68.sr |= (0x2000+((LVL)<<SR_IPL_BIT)); \</span>
<a name="l00046"></a>00046 <span class="preprocessor"> reg68.pc = read_L(VECTOR); \</span>
<a name="l00047"></a>00047 <span class="preprocessor">}</span>
<a name="l00048"></a>00048 <span class="preprocessor"></span>
<a name="l00050"></a><a class="code" href="macro68_8h.html#50f4496a33308c2325e5c9cea9ccd9f2">00050</a> <span class="preprocessor">#define ILLEGAL \</span>
<a name="l00051"></a>00051 <span class="preprocessor">{\</span>
<a name="l00052"></a>00052 <span class="preprocessor"> EMU68error_add("Illegal pc:%06x",reg68.pc); \</span>
<a name="l00053"></a>00053 <span class="preprocessor"> EXCEPTION(ILLEGAL_VECTOR,ILLEGAL_LVL); \</span>
<a name="l00054"></a>00054 <span class="preprocessor">}</span>
<a name="l00055"></a>00055 <span class="preprocessor"></span>
<a name="l00057"></a><a class="code" href="macro68_8h.html#be98308cc3e5190044294f4f626b4442">00057</a> <span class="preprocessor">#define BUSERROR(ADDR,MODE) \</span>
<a name="l00058"></a>00058 <span class="preprocessor">{\</span>
<a name="l00059"></a>00059 <span class="preprocessor"> EMU68error_add("bus error pc:%06x addr:%06x (%c)",\</span>
<a name="l00060"></a>00060 <span class="preprocessor"> reg68.pc,ADDR,MODE?'W':'R');\</span>
<a name="l00061"></a>00061 <span class="preprocessor"> EXCEPTION(BUSERROR_VECTOR,BUSERROR_LVL) \</span>
<a name="l00062"></a>00062 <span class="preprocessor">}</span>
<a name="l00063"></a>00063 <span class="preprocessor"></span>
<a name="l00065"></a><a class="code" href="macro68_8h.html#ecf2e1f677876da4397423d9d2bd08e2">00065</a> <span class="preprocessor">#define LINEA EXCEPTION(LINEA_VECTOR,LINEA_LVL)</span>
<a name="l00066"></a>00066 <span class="preprocessor"></span>
<a name="l00068"></a><a class="code" href="macro68_8h.html#f237af18c5657f78a1bb0c8434b5cc8d">00068</a> <span class="preprocessor">#define LINEF EXCEPTION(LINEF_VECTOR,LINEF_LVL)</span>
<a name="l00069"></a>00069 <span class="preprocessor"></span>
<a name="l00071"></a><a class="code" href="macro68_8h.html#28d5b3accc8e77e4dbb4da615d46312f">00071</a> <span class="preprocessor">#define TRAPV if(reg68.sr&SR_V) EXCEPTION(TRAPV_VECTOR,TRAPV_LVL)</span>
<a name="l00072"></a>00072 <span class="preprocessor"></span>
<a name="l00074"></a><a class="code" href="macro68_8h.html#b677c17b45660f2cbea68ef8784d017f">00074</a> <span class="preprocessor">#define TRAP(TRAP_N) EXCEPTION(TRAP_VECTOR(TRAP_N),TRAP_LVL)</span>
<a name="l00075"></a>00075 <span class="preprocessor"></span>
<a name="l00077"></a><a class="code" href="macro68_8h.html#5ccabf1aaaf2408ff4bec6b4a27d076b">00077</a> <span class="preprocessor">#define CHK EXCEPTION(CHK_VECTOR,CHK_LVL)</span>
<a name="l00078"></a>00078 <span class="preprocessor"></span>
<a name="l00080"></a><a class="code" href="macro68_8h.html#7fef6081b06bc5ee2638625313745c4e">00080</a> <span class="preprocessor">#define CHKW(CHK_A,CHK_B) if((CHK_B)<0 || (CHK_B)>(CHK_A)){ CHK; }</span>
<a name="l00081"></a>00081 <span class="preprocessor"></span>
<a name="l00090"></a><a class="code" href="macro68_8h.html#700f88377bf36711b711f69b06c52f5d">00090</a> <span class="preprocessor">#define NOP</span>
<a name="l00091"></a>00091 <span class="preprocessor"></span>
<a name="l00093"></a><a class="code" href="macro68_8h.html#b702106cf3b3e96750b6845ded4e0299">00093</a> <span class="preprocessor">#define RESET EMU68_reset()</span>
<a name="l00094"></a>00094 <span class="preprocessor"></span>
<a name="l00099"></a><a class="code" href="macro68_8h.html#e19b6bb2940d2fbe0a79852b070eeafd">00099</a> <span class="preprocessor">#define STOP reg68.sr = (u16)get_nextw(); reg68.status = 1</span>
<a name="l00100"></a>00100 <span class="preprocessor"></span>
<a name="l00102"></a><a class="code" href="macro68_8h.html#5da46cdb9a2133d1b4f0db71a332ba2e">00102</a> <span class="preprocessor">#define RTS reg68.pc = popl()</span>
<a name="l00103"></a>00103 <span class="preprocessor"></span>
<a name="l00105"></a><a class="code" href="macro68_8h.html#5807d8becfd6e182041e4ccca3eeb20a">00105</a> <span class="preprocessor">#define RTE reg68.sr = popw(); RTS</span>
<a name="l00106"></a>00106 <span class="preprocessor"></span>
<a name="l00108"></a><a class="code" href="macro68_8h.html#8f14d04b8bcaf04226f4fe5c112b60aa">00108</a> <span class="preprocessor">#define RTR reg68.sr = (reg68.sr&0xFF00) | (u8)popw(); RTS</span>
<a name="l00109"></a>00109 <span class="preprocessor"></span>
<a name="l00118"></a><a class="code" href="macro68_8h.html#e57f476554857ff7dbf3925a1854c1be">00118</a> <span class="preprocessor">#define NBCDB(NBCD_S,NBCD_A) (NBCD_S)=(NBCD_A)</span>
<a name="l00119"></a>00119 <span class="preprocessor"></span>
<a name="l00121"></a><a class="code" href="macro68_8h.html#2028670c42d483d106c2f088c9ae7e1a">00121</a> <span class="preprocessor">#define EXG(A,B) (A)^=(B); (B)^=(A); (A)^=(B)</span>
<a name="l00122"></a>00122 <span class="preprocessor"></span>
<a name="l00124"></a><a class="code" href="macro68_8h.html#43ba1e48ab3e4ae9e15e9b2894bd9fbe">00124</a> <span class="preprocessor">#define EXTW(D) (D) = ((D)&0xFFFF0000) | ((u16)(s32)(s8)(D))</span>
<a name="l00125"></a>00125 <span class="preprocessor"></span>
<a name="l00127"></a><a class="code" href="macro68_8h.html#4a60eb72a9bde7ad33449dcd956d8872">00127</a> <span class="preprocessor">#define EXTL(D) (D) = (s32)(s16)(D)</span>
<a name="l00128"></a>00128 <span class="preprocessor"></span>
<a name="l00130"></a><a class="code" href="macro68_8h.html#1dcb91751f0ea83de1926fe31edc308b">00130</a> <span class="preprocessor">#define TAS(TAS_A) { TSTB(TAS_A,TAS_A); (TAS_A) |= 0x80000000; }</span>
<a name="l00131"></a>00131 <span class="preprocessor"></span>
<a name="l00133"></a><a class="code" href="macro68_8h.html#0cbf0b9c373ada722f2e3940a8e837a3">00133</a> <span class="preprocessor">#define CLR(CLR_S,CLR_A) \</span>
<a name="l00134"></a>00134 <span class="preprocessor">{\</span>
<a name="l00135"></a>00135 <span class="preprocessor"> (CLR_A) = (CLR_A); \</span>
<a name="l00136"></a>00136 <span class="preprocessor"> reg68.sr =(reg68.sr&~(SR_N|SR_V|SR_C)) | SR_Z;\</span>
<a name="l00137"></a>00137 <span class="preprocessor"> CLR_S = 0;\</span>
<a name="l00138"></a>00138 <span class="preprocessor">}</span>
<a name="l00139"></a>00139 <span class="preprocessor"></span>
<a name="l00141"></a><a class="code" href="macro68_8h.html#3999d24bd7bc6cd9fe716fe66a0309f3">00141</a> <span class="preprocessor">#define CLRB(A,B) CLR(A,B)</span>
<a name="l00142"></a>00142 <span class="preprocessor"></span>
<a name="l00144"></a><a class="code" href="macro68_8h.html#8131676f4c04dc5ed97cb90f905d1db9">00144</a> <span class="preprocessor">#define CLRW(A,B) CLR(A,B)</span>
<a name="l00145"></a>00145 <span class="preprocessor"></span>
<a name="l00147"></a><a class="code" href="macro68_8h.html#6a54e13ddc6874c7163c95c71cb661a4">00147</a> <span class="preprocessor">#define CLRL(A,B) CLR(A,B)</span>
<a name="l00148"></a>00148 <span class="preprocessor"></span>
<a name="l00150"></a><a class="code" href="macro68_8h.html#cabdc746fdfa7e8a587104efcd13b145">00150</a> <span class="preprocessor">#define LINK(R_LNK) \</span>
<a name="l00151"></a>00151 <span class="preprocessor"> pushl(reg68.a[R_LNK]); \</span>
<a name="l00152"></a>00152 <span class="preprocessor"> reg68.a[R_LNK] = reg68.a[7]; \</span>
<a name="l00153"></a>00153 <span class="preprocessor"> reg68.a[7] += get_nextw()</span>
<a name="l00154"></a>00154 <span class="preprocessor"></span>
<a name="l00156"></a><a class="code" href="macro68_8h.html#207482409eaa458a93dc02f7f89a55fe">00156</a> <span class="preprocessor">#define UNLK(R_LNK) \</span>
<a name="l00157"></a>00157 <span class="preprocessor"> reg68.a[7]=reg68.a[R_LNK]; \</span>
<a name="l00158"></a>00158 <span class="preprocessor"> reg68.a[R_LNK]=popl()</span>
<a name="l00159"></a>00159 <span class="preprocessor"></span>
<a name="l00161"></a><a class="code" href="macro68_8h.html#437700508dff5a665d62caed6d19962a">00161</a> <span class="preprocessor">#define SWAP(SWP_A) \</span>
<a name="l00162"></a>00162 <span class="preprocessor">{ \</span>
<a name="l00163"></a>00163 <span class="preprocessor"> (SWP_A) = ((u32)(SWP_A)>>16) | ((SWP_A)<<16); \</span>
<a name="l00164"></a>00164 <span class="preprocessor"> reg68.sr = (reg68.sr&~(SR_V|SR_C|SR_Z|SR_N)) | \</span>
<a name="l00165"></a>00165 <span class="preprocessor"> ((!(SWP_A))<<SR_Z_BIT) | \</span>
<a name="l00166"></a>00166 <span class="preprocessor"> (((s32)(SWP_A)>>31)&SR_N); \</span>
<a name="l00167"></a>00167 <span class="preprocessor">}</span>
<a name="l00168"></a>00168 <span class="preprocessor"></span>
<a name="l00176"></a>00176 <span class="preprocessor">#if 0</span>
<a name="l00177"></a>00177 <span class="preprocessor"></span>
<a name="l00178"></a>00178 <span class="preprocessor">#define BTST(V,BIT) \</span>
<a name="l00179"></a>00179 <span class="preprocessor"> reg68.sr = (reg68.sr&(~SR_Z)) | ((((V)&(1<<(BIT)))==0)<<SR_Z_BIT)</span>
<a name="l00180"></a>00180 <span class="preprocessor"></span>
<a name="l00182"></a>00182 <span class="preprocessor">#define BSET(V,BIT) BTST(V,BIT); (V) |= (1<<(BIT));</span>
<a name="l00183"></a>00183 <span class="preprocessor"></span>
<a name="l00185"></a>00185 <span class="preprocessor">#define BCLR(V,BIT) BTST(V,BIT); (V) &= ~(1<<(BIT));</span>
<a name="l00186"></a>00186 <span class="preprocessor"></span>
<a name="l00188"></a>00188 <span class="preprocessor">#define BCHG(V,BIT) BTST(V,BIT); (V) ^= (1<<(BIT));</span>
<a name="l00189"></a>00189 <span class="preprocessor"></span>*/
<a name="l00190"></a>00190 <span class="preprocessor">#endif</span>
<a name="l00191"></a>00191 <span class="preprocessor"></span>
<a name="l00193"></a><a class="code" href="macro68_8h.html#cbec8f78bfb513f8ef386bc0cb37140d">00193</a> <span class="preprocessor">#define BTST(V,BIT) \</span>
<a name="l00194"></a>00194 <span class="preprocessor"> reg68.sr = (reg68.sr&(~SR_Z)) | (((((V)>>(BIT))&1)^1)<<SR_Z_BIT)</span>
<a name="l00195"></a>00195 <span class="preprocessor"></span>
<a name="l00197"></a><a class="code" href="macro68_8h.html#9e3dfa1ebebfd77f10b81218e221b141">00197</a> <span class="preprocessor">#define BSET(V,BIT) \</span>
<a name="l00198"></a>00198 <span class="preprocessor">if( (V)&(1<<(BIT)) ) { reg68.sr &= ~SR_Z; }\</span>
<a name="l00199"></a>00199 <span class="preprocessor">else { (V) |= 1<<(BIT); reg68.sr |= SR_Z; }</span>
<a name="l00200"></a>00200 <span class="preprocessor"></span>
<a name="l00202"></a><a class="code" href="macro68_8h.html#9c1e975d7c0e874a2110b6bb1c26fe1a">00202</a> <span class="preprocessor">#define BCLR(V,BIT) \</span>
<a name="l00203"></a>00203 <span class="preprocessor">if( (V)&(1<<(BIT)) ) { (V) &= ~(1<<(BIT)); reg68.sr &= ~SR_Z; }\</span>
<a name="l00204"></a>00204 <span class="preprocessor">else { reg68.sr |= SR_Z; }</span>
<a name="l00205"></a>00205 <span class="preprocessor"></span>
<a name="l00207"></a><a class="code" href="macro68_8h.html#09f70aac938aa9c8b83269d32d347121">00207</a> <span class="preprocessor">#define BCHG(V,BIT) \</span>
<a name="l00208"></a>00208 <span class="preprocessor">if( (V)&(1<<(BIT)) ) { (V) &= ~(1<<(BIT)); reg68.sr &= ~SR_Z; }\</span>
<a name="l00209"></a>00209 <span class="preprocessor">else { (V) |= 1<<(BIT); reg68.sr |= SR_Z; }</span>
<a name="l00210"></a>00210 <span class="preprocessor"></span>
<a name="l00218"></a>00218 <span class="preprocessor">#define MOVE(MOV_A) reg68.sr = (reg68.sr&(0xFF00 | SR_X)) \</span>
<a name="l00219"></a>00219 <span class="preprocessor"> | (((MOV_A)==0)<<SR_Z_BIT) | (((s32)(MOV_A)>>31)&SR_N);</span>
<a name="l00220"></a>00220 <span class="preprocessor"></span><span class="preprocessor">#define TST(TST_V) MOVE(TST_V)</span>
<a name="l00221"></a>00221 <span class="preprocessor"></span><span class="preprocessor">#define TSTB(TST_S,TST_A) { TST_S=TST_A; TST(TST_S); }</span>
<a name="l00222"></a>00222 <span class="preprocessor"></span><span class="preprocessor">#define TSTW(TST_S,TST_A) { TST_S=TST_A; TST(TST_S); }</span>
<a name="l00223"></a>00223 <span class="preprocessor"></span><span class="preprocessor">#define TSTL(TST_S,TST_A) { TST_S=TST_A; TST(TST_S); }</span>
<a name="l00224"></a>00224 <span class="preprocessor"></span>
<a name="l00233"></a><a class="code" href="macro68_8h.html#dad07bc9c659173706c0e00bfdd2824c">00233</a> <span class="preprocessor">#define MULSW(MUL_S, MUL_A, MUL_B) MUL_S = muls68(MUL_A, MUL_B)</span>
<a name="l00234"></a>00234 <span class="preprocessor"></span>
<a name="l00236"></a><a class="code" href="macro68_8h.html#26c07b161cd6aa0439daf3d933a92697">00236</a> <span class="preprocessor">#define MULUW(MUL_S, MUL_A, MUL_B) MUL_S = mulu68(MUL_A, MUL_B)</span>
<a name="l00237"></a>00237 <span class="preprocessor"></span>
<a name="l00239"></a><a class="code" href="macro68_8h.html#ad5f7e9d536c30813ccef8826b5fcb71">00239</a> <span class="preprocessor">#define DIVSW(DIV_S, DIV_A, DIV_B) DIV_S = divs68(DIV_A, DIV_B)</span>
<a name="l00240"></a>00240 <span class="preprocessor"></span>
<a name="l00242"></a><a class="code" href="macro68_8h.html#c2f4b35c99a2948f04c62c714e682bf2">00242</a> <span class="preprocessor">#define DIVUW(DIV_S, DIV_A, DIV_B) DIV_S = divu68(DIV_A, DIV_B)</span>
<a name="l00243"></a>00243 <span class="preprocessor"></span>
<a name="l00252"></a><a class="code" href="macro68_8h.html#728e137c866ee949f69816a2ceff539a">00252</a> <span class="preprocessor">#define AND(AND_S, AND_A, AND_B) AND_S = and68(AND_A, AND_B)</span>
<a name="l00253"></a>00253 <span class="preprocessor"></span>
<a name="l00255"></a><a class="code" href="macro68_8h.html#d972449d7e05ae60764f4eb2620e025e">00255</a> <span class="preprocessor">#define ANDB(AND_S, AND_A, AND_B) AND(AND_S, AND_A, AND_B)</span>
<a name="l00256"></a>00256 <span class="preprocessor"></span>
<a name="l00258"></a><a class="code" href="macro68_8h.html#8d63151cdbcf39fd2fa6b240bb0bb3f0">00258</a> <span class="preprocessor">#define ANDW(AND_S, AND_A, AND_B) AND(AND_S, AND_A, AND_B)</span>
<a name="l00259"></a>00259 <span class="preprocessor"></span>
<a name="l00261"></a><a class="code" href="macro68_8h.html#79954b6e88c6b20e566ab890fe051d9a">00261</a> <span class="preprocessor">#define ANDL(AND_S, AND_A, AND_B) AND(AND_S, AND_A, AND_B)</span>
<a name="l00262"></a>00262 <span class="preprocessor"></span>
<a name="l00263"></a>00263
<a name="l00265"></a><a class="code" href="macro68_8h.html#677d883d40a07fb971e3496cc99701c0">00265</a> <span class="preprocessor">#define ORR(ORR_S, ORR_A, ORR_B) ORR_S = orr68(ORR_A, ORR_B)</span>
<a name="l00266"></a>00266 <span class="preprocessor"></span>
<a name="l00268"></a><a class="code" href="macro68_8h.html#c4a543252cc9b0f8f418a74444d66fa4">00268</a> <span class="preprocessor">#define ORB(ORR_S, ORR_A, ORR_B) ORR(ORR_S, ORR_A, ORR_B)</span>
<a name="l00269"></a>00269 <span class="preprocessor"></span>
<a name="l00271"></a><a class="code" href="macro68_8h.html#c9ac7a69fad700b345e43e5481f41e31">00271</a> <span class="preprocessor">#define ORW(ORR_S, ORR_A, ORR_B) ORR(ORR_S, ORR_A, ORR_B)</span>
<a name="l00272"></a>00272 <span class="preprocessor"></span>
<a name="l00274"></a><a class="code" href="macro68_8h.html#d287e8a16c1f3d00e0b4e5b19ee996c8">00274</a> <span class="preprocessor">#define ORL(ORR_S, ORR_A, ORR_B) ORR(ORR_S, ORR_A, ORR_B)</span>
<a name="l00275"></a>00275 <span class="preprocessor"></span>
<a name="l00276"></a>00276
<a name="l00278"></a><a class="code" href="macro68_8h.html#44b282cbcfb2007767762a301c7a00ae">00278</a> <span class="preprocessor">#define EOR(EOR_S, EOR_A, EOR_B) EOR_S = eor68(EOR_A, EOR_B)</span>
<a name="l00279"></a>00279 <span class="preprocessor"></span>
<a name="l00281"></a><a class="code" href="macro68_8h.html#3708773ba26e7cb77a64dc8dfa2ae4c1">00281</a> <span class="preprocessor">#define EORB(EOR_S, EOR_A, EOR_B) EOR(EOR_S, EOR_A, EOR_B)</span>
<a name="l00282"></a>00282 <span class="preprocessor"></span>
<a name="l00284"></a><a class="code" href="macro68_8h.html#ea4de1f4ef50628e47a816a2c365cdbd">00284</a> <span class="preprocessor">#define EORW(EOR_S, EOR_A, EOR_B) EOR(EOR_S, EOR_A, EOR_B)</span>
<a name="l00285"></a>00285 <span class="preprocessor"></span>
<a name="l00287"></a><a class="code" href="macro68_8h.html#44bbd20b80c6bdb4d15d6029d615ac2b">00287</a> <span class="preprocessor">#define EORL(EOR_S, EOR_A, EOR_B) EOR(EOR_S, EOR_A, EOR_B)</span>
<a name="l00288"></a>00288 <span class="preprocessor"></span>
<a name="l00289"></a>00289
<a name="l00291"></a><a class="code" href="macro68_8h.html#1eae181b74b282ebd1d358b903520433">00291</a> <span class="preprocessor">#define NOT(NOT_S,NOT_A) NOT_S = not68(NOT_A)</span>
<a name="l00292"></a>00292 <span class="preprocessor"></span>
<a name="l00294"></a><a class="code" href="macro68_8h.html#3e2b11e2a5a2c48dd9ead9519b12f9f1">00294</a> <span class="preprocessor">#define NOTB(A,B) NOT(A,B)</span>
<a name="l00295"></a>00295 <span class="preprocessor"></span>
<a name="l00297"></a><a class="code" href="macro68_8h.html#7003129e40217ac4bcf15d3a8aeab0e5">00297</a> <span class="preprocessor">#define NOTW(A,B) NOT(A,B)</span>
<a name="l00298"></a>00298 <span class="preprocessor"></span>
<a name="l00300"></a><a class="code" href="macro68_8h.html#1afffa6abcc68afc2f0411089572e795">00300</a> <span class="preprocessor">#define NOTL(A,B) NOT(A,B)</span>
<a name="l00301"></a>00301 <span class="preprocessor"></span>
<a name="l00306"></a>00306 <span class="preprocessor">#define ADD(ADD_S,ADD_A,ADD_B,ADD_X) ADD_S=add68(ADD_A,ADD_B,ADD_X)</span>
<a name="l00307"></a>00307 <span class="preprocessor"></span><span class="preprocessor">#define SUB(SUB_S,SUB_A,SUB_B,SUB_X) SUB_S=sub68(SUB_B,SUB_A,SUB_X)</span>
<a name="l00308"></a>00308 <span class="preprocessor"></span><span class="preprocessor">#define CMP(SUB_A,SUB_B) sub68(SUB_B,SUB_A,0)</span>
<a name="l00309"></a>00309 <span class="preprocessor"></span>
<a name="l00310"></a>00310 <span class="preprocessor">#define ADDB(ADD_S, ADD_A, ADD_B) ADD(ADD_S, ADD_A, ADD_B,0)</span>
<a name="l00311"></a>00311 <span class="preprocessor"></span><span class="preprocessor">#define ADDW(ADD_S, ADD_A, ADD_B) ADD(ADD_S, ADD_A, ADD_B,0)</span>
<a name="l00312"></a>00312 <span class="preprocessor"></span><span class="preprocessor">#define ADDL(ADD_S, ADD_A, ADD_B) ADD(ADD_S, ADD_A, ADD_B,0)</span>
<a name="l00313"></a>00313 <span class="preprocessor"></span><span class="preprocessor">#define ADDXB(ADD_S, ADD_A, ADD_B) \</span>
<a name="l00314"></a>00314 <span class="preprocessor"> ADD(ADD_S, ADD_A, ADD_B, (reg68.sr&SR_X)<<(24-SR_X_BIT))</span>
<a name="l00315"></a>00315 <span class="preprocessor"></span><span class="preprocessor">#define ADDXW(ADD_S, ADD_A, ADD_B) \</span>
<a name="l00316"></a>00316 <span class="preprocessor"> ADD(ADD_S, ADD_A, ADD_B, (reg68.sr&SR_X)<<(16-SR_X_BIT))</span>
<a name="l00317"></a>00317 <span class="preprocessor"></span><span class="preprocessor">#define ADDXL(ADD_S, ADD_A, ADD_B) \</span>
<a name="l00318"></a>00318 <span class="preprocessor"> ADD(ADD_S, ADD_A, ADD_B, (reg68.sr&SR_X)>>SR_X_BIT )</span>
<a name="l00319"></a>00319 <span class="preprocessor"></span>
<a name="l00320"></a>00320 <span class="preprocessor">#define ADDA(ADD_S, ADD_A, ADD_B) (ADD_S) = (ADD_A) + (ADD_B)</span>
<a name="l00321"></a>00321 <span class="preprocessor"></span><span class="preprocessor">#define ADDAW(ADD_S, ADD_A, ADD_B) ADDA(ADD_S, ADD_A>>16, ADD_B)</span>
<a name="l00322"></a>00322 <span class="preprocessor"></span><span class="preprocessor">#define ADDAL(ADD_S, ADD_A, ADD_B) ADDA(ADD_S, ADD_A, ADD_B)</span>
<a name="l00323"></a>00323 <span class="preprocessor"></span>
<a name="l00324"></a>00324 <span class="preprocessor">#define SUBB(SUB_S, SUB_A, SUB_B) SUB(SUB_S, SUB_A, SUB_B,0)</span>
<a name="l00325"></a>00325 <span class="preprocessor"></span><span class="preprocessor">#define SUBW(SUB_S, SUB_A, SUB_B) SUB(SUB_S, SUB_A, SUB_B,0)</span>
<a name="l00326"></a>00326 <span class="preprocessor"></span><span class="preprocessor">#define SUBL(SUB_S, SUB_A, SUB_B) SUB(SUB_S, SUB_A, SUB_B,0)</span>
<a name="l00327"></a>00327 <span class="preprocessor"></span>
<a name="l00328"></a>00328 <span class="preprocessor">#define SUBXB(SUB_S, SUB_A, SUB_B) \</span>
<a name="l00329"></a>00329 <span class="preprocessor"> SUB(SUB_S, SUB_A, SUB_B, (reg68.sr&SR_X)<<(24-SR_X_BIT))</span>
<a name="l00330"></a>00330 <span class="preprocessor"></span><span class="preprocessor">#define SUBXW(SUB_S, SUB_A, SUB_B) \</span>
<a name="l00331"></a>00331 <span class="preprocessor"> SUB(SUB_S, SUB_A, SUB_B, (reg68.sr&SR_X)<<(16-SR_X_BIT))</span>
<a name="l00332"></a>00332 <span class="preprocessor"></span><span class="preprocessor">#define SUBXL(SUB_S, SUB_A, SUB_B) \</span>
<a name="l00333"></a>00333 <span class="preprocessor"> SUB(SUB_S, SUB_A, SUB_B, (reg68.sr&SR_X)>>SR_X_BIT)</span>
<a name="l00334"></a>00334 <span class="preprocessor"></span>
<a name="l00335"></a>00335 <span class="preprocessor">#define SUBA(SUB_S, SUB_A, SUB_B) (SUB_S) = (SUB_B) - (SUB_A)</span>
<a name="l00336"></a>00336 <span class="preprocessor"></span><span class="preprocessor">#define SUBAW(SUB_S, SUB_A, SUB_B) \</span>
<a name="l00337"></a>00337 <span class="preprocessor"> {\</span>
<a name="l00338"></a>00338 <span class="preprocessor"> s32 ZOB = (SUB_A)>>16;\</span>
<a name="l00339"></a>00339 <span class="preprocessor"> SUBA(SUB_S, ZOB, SUB_B);\</span>
<a name="l00340"></a>00340 <span class="preprocessor"> }</span>
<a name="l00341"></a>00341 <span class="preprocessor"></span><span class="preprocessor">#define SUBAL(SUB_S, SUB_A, SUB_B) SUBA(SUB_S, SUB_A, SUB_B)</span>
<a name="l00342"></a>00342 <span class="preprocessor"></span>
<a name="l00343"></a>00343 <span class="preprocessor">#define CMPB(CMP_A, CMP_B) CMP(CMP_A, CMP_B)</span>
<a name="l00344"></a>00344 <span class="preprocessor"></span><span class="preprocessor">#define CMPW(CMP_A, CMP_B) CMP(CMP_A, CMP_B)</span>
<a name="l00345"></a>00345 <span class="preprocessor"></span><span class="preprocessor">#define CMPL(CMP_A, CMP_B) CMP(CMP_A, CMP_B)</span>
<a name="l00346"></a>00346 <span class="preprocessor"></span><span class="preprocessor">#define CMPA(CMP_A, CMP_B) CMP(CMP_A, CMP_B)</span>
<a name="l00347"></a>00347 <span class="preprocessor"></span><span class="preprocessor">#define CMPAW(CMP_A, CMP_B) \</span>
<a name="l00348"></a>00348 <span class="preprocessor"> {\</span>
<a name="l00349"></a>00349 <span class="preprocessor"> s32 ZOB = (CMP_A)>>16;\</span>
<a name="l00350"></a>00350 <span class="preprocessor"> CMPA( ZOB, CMP_B);\</span>
<a name="l00351"></a>00351 <span class="preprocessor"> }</span>
<a name="l00352"></a>00352 <span class="preprocessor"></span><span class="preprocessor">#define CMPAL(CMP_A, CMP_B) CMP(CMP_A, CMP_B)</span>
<a name="l00353"></a>00353 <span class="preprocessor"></span>
<a name="l00354"></a>00354 <span class="preprocessor">#define NEGB(NEG_S,NEG_A) SUBB(NEG_S,NEG_A,0)</span>
<a name="l00355"></a>00355 <span class="preprocessor"></span><span class="preprocessor">#define NEGW(NEG_S,NEG_A) SUBW(NEG_S,NEG_A,0)</span>
<a name="l00356"></a>00356 <span class="preprocessor"></span><span class="preprocessor">#define NEGL(NEG_S,NEG_A) SUBL(NEG_S,NEG_A,0)</span>
<a name="l00357"></a>00357 <span class="preprocessor"></span>
<a name="l00358"></a>00358 <span class="preprocessor">#define NEGXB(NEG_S,NEG_A) SUBXB(NEG_S,NEG_A,0)</span>
<a name="l00359"></a>00359 <span class="preprocessor"></span><span class="preprocessor">#define NEGXW(NEG_S,NEG_A) SUBXW(NEG_S,NEG_A,0)</span>
<a name="l00360"></a>00360 <span class="preprocessor"></span><span class="preprocessor">#define NEGXL(NEG_S,NEG_A) SUBXL(NEG_S,NEG_A,0)</span>
<a name="l00361"></a>00361 <span class="preprocessor"></span>
<a name="l00370"></a><a class="code" href="macro68_8h.html#62f78dccd3f300863730f230b762b17b">00370</a> <span class="preprocessor">#define LSR(LSR_A,LSR_D,LSR_MSK,LSR_C) \</span>
<a name="l00371"></a>00371 <span class="preprocessor">{\</span>
<a name="l00372"></a>00372 <span class="preprocessor"> reg68.sr &= 0xFF00;\</span>
<a name="l00373"></a>00373 <span class="preprocessor"> if((LSR_D)!=0) \</span>
<a name="l00374"></a>00374 <span class="preprocessor"> {\</span>
<a name="l00375"></a>00375 <span class="preprocessor"> ADDCYCLE(2*(LSR_D));\</span>
<a name="l00376"></a>00376 <span class="preprocessor"> (LSR_A) >>= (LSR_D)-1;\</span>
<a name="l00377"></a>00377 <span class="preprocessor"> if((LSR_A)&(LSR_C)) reg68.sr |= SR_X | SR_C;\</span>
<a name="l00378"></a>00378 <span class="preprocessor"> (LSR_A)>>=1;\</span>
<a name="l00379"></a>00379 <span class="preprocessor"> }\</span>
<a name="l00380"></a>00380 <span class="preprocessor"> (LSR_A) &= (LSR_MSK);\</span>
<a name="l00381"></a>00381 <span class="preprocessor"> reg68.sr |= (((LSR_A)==0)<<SR_Z_BIT) | (((s32)(LSR_A)<0)<<SR_N_BIT);\</span>
<a name="l00382"></a>00382 <span class="preprocessor">}</span>
<a name="l00383"></a>00383 <span class="preprocessor"></span>
<a name="l00385"></a><a class="code" href="macro68_8h.html#66eee939032d569aae1c9e2af2a153ae">00385</a> <span class="preprocessor">#define LSRB(LSR_A,LSR_B) LSR(LSR_A,LSR_B,0xFF000000,(1<<24))</span>
<a name="l00386"></a>00386 <span class="preprocessor"></span>
<a name="l00388"></a><a class="code" href="macro68_8h.html#cda251ffd0e1c91d6719b77c58ef53a7">00388</a> <span class="preprocessor">#define LSRW(LSR_A,LSR_B) LSR(LSR_A,LSR_B,0xFFFF0000,(1<<16))</span>
<a name="l00389"></a>00389 <span class="preprocessor"></span>
<a name="l00391"></a><a class="code" href="macro68_8h.html#389f0f970a4b922262fca9142e81f5b8">00391</a> <span class="preprocessor">#define LSRL(LSR_A,LSR_B) LSR(LSR_A,LSR_B,0xFFFFFFFF,(1<<0))</span>
<a name="l00392"></a>00392 <span class="preprocessor"></span>
<a name="l00394"></a><a class="code" href="macro68_8h.html#fda032ebebb1ac2422b6294d946ffd57">00394</a> <span class="preprocessor">#define ASRB(LSR_A,LSR_B) LSR(LSR_A,LSR_B,0xFF000000,(1<<24))</span>
<a name="l00395"></a>00395 <span class="preprocessor"></span>
<a name="l00397"></a><a class="code" href="macro68_8h.html#352408838f3c61c43436d81b5ccf4f55">00397</a> <span class="preprocessor">#define ASRW(LSR_A,LSR_B) LSR(LSR_A,LSR_B,0xFFFF0000,(1<<16))</span>
<a name="l00398"></a>00398 <span class="preprocessor"></span>
<a name="l00400"></a><a class="code" href="macro68_8h.html#1de7c77e7fdc80cf4d18e60b5d9de4ff">00400</a> <span class="preprocessor">#define ASRL(LSR_A,LSR_B) LSR(LSR_A,LSR_B,0xFFFFFFFF,(1<<0))</span>
<a name="l00401"></a>00401 <span class="preprocessor"></span>
<a name="l00403"></a><a class="code" href="macro68_8h.html#32f934a87ef94acfd506fba08a9df435">00403</a> <span class="preprocessor">#define LSL(LSL_A,LSL_D,LSL_MSK) \</span>
<a name="l00404"></a>00404 <span class="preprocessor">{\</span>
<a name="l00405"></a>00405 <span class="preprocessor"> reg68.sr &= 0xFF00;\</span>
<a name="l00406"></a>00406 <span class="preprocessor"> if((LSL_D)!=0) \</span>
<a name="l00407"></a>00407 <span class="preprocessor"> {\</span>
<a name="l00408"></a>00408 <span class="preprocessor"> ADDCYCLE(2*(LSL_D));\</span>
<a name="l00409"></a>00409 <span class="preprocessor"> (LSL_A) <<= (LSL_D)-1;\</span>
<a name="l00410"></a>00410 <span class="preprocessor"> if((LSL_A)&0x80000000) reg68.sr |= SR_X | SR_C;\</span>
<a name="l00411"></a>00411 <span class="preprocessor"> (LSL_A)<<=1;\</span>
<a name="l00412"></a>00412 <span class="preprocessor"> }\</span>
<a name="l00413"></a>00413 <span class="preprocessor"> (LSL_A) &= (LSL_MSK);\</span>
<a name="l00414"></a>00414 <span class="preprocessor"> reg68.sr |= (((LSL_A)==0)<<SR_Z_BIT) | (((s32)(LSL_A)<0)<<SR_N_BIT);\</span>
<a name="l00415"></a>00415 <span class="preprocessor">}</span>
<a name="l00416"></a>00416 <span class="preprocessor"></span>
<a name="l00418"></a><a class="code" href="macro68_8h.html#472d1ec4b53c4722473b9c0535338cb5">00418</a> <span class="preprocessor">#define LSLB(LSL_A,LSL_B) LSL(LSL_A,LSL_B,0xFF000000)</span>
<a name="l00419"></a>00419 <span class="preprocessor"></span>
<a name="l00421"></a><a class="code" href="macro68_8h.html#c850ec650a19af8c36146905bebd269b">00421</a> <span class="preprocessor">#define LSLW(LSL_A,LSL_B) LSL(LSL_A,LSL_B,0xFFFF0000)</span>
<a name="l00422"></a>00422 <span class="preprocessor"></span>
<a name="l00424"></a><a class="code" href="macro68_8h.html#956a2dcbf6030d19cd5b71ba7827727d">00424</a> <span class="preprocessor">#define LSLL(LSL_A,LSL_B) LSL(LSL_A,LSL_B,0xFFFFFFFF)</span>
<a name="l00425"></a>00425 <span class="preprocessor"></span>
<a name="l00427"></a><a class="code" href="macro68_8h.html#1dd79a92be184f728f8334444021fff6">00427</a> <span class="preprocessor">#define ASLB(LSL_A,LSL_B) LSL(LSL_A,LSL_B,0xFF000000)</span>
<a name="l00428"></a>00428 <span class="preprocessor"></span>
<a name="l00430"></a><a class="code" href="macro68_8h.html#54ce6271abd10badaf2403522085e0e9">00430</a> <span class="preprocessor">#define ASLW(LSL_A,LSL_B) LSL(LSL_A,LSL_B,0xFFFF0000)</span>
<a name="l00431"></a>00431 <span class="preprocessor"></span>
<a name="l00433"></a><a class="code" href="macro68_8h.html#02ada02c27ff61f9cc45f7387df01777">00433</a> <span class="preprocessor">#define ASLL(LSL_A,LSL_B) LSL(LSL_A,LSL_B,0xFFFFFFFF)</span>
<a name="l00434"></a>00434 <span class="preprocessor"></span>
<a name="l00436"></a><a class="code" href="macro68_8h.html#b68fd08adcd92db17b1105faedc53039">00436</a> <span class="preprocessor">#define ROR(ROR_A,ROR_D,ROR_MSK,ROR_SZ) \</span>
<a name="l00437"></a>00437 <span class="preprocessor">{\</span>
<a name="l00438"></a>00438 <span class="preprocessor"> reg68.sr &= 0xFF00 | SR_X;\</span>
<a name="l00439"></a>00439 <span class="preprocessor"> if((ROR_D)!=0) \</span>
<a name="l00440"></a>00440 <span class="preprocessor"> {\</span>
<a name="l00441"></a>00441 <span class="preprocessor"> ADDCYCLE(2*(ROR_D));\</span>
<a name="l00442"></a>00442 <span class="preprocessor"> ROR_D &= (ROR_SZ)-1;\</span>
<a name="l00443"></a>00443 <span class="preprocessor"> if((ROR_A)&(1<<((ROR_D)-1+32-(ROR_SZ)))) reg68.sr |= SR_C;\</span>
<a name="l00444"></a>00444 <span class="preprocessor"> (ROR_A) &= (ROR_MSK);\</span>
<a name="l00445"></a>00445 <span class="preprocessor"> (ROR_A) = ((ROR_A)>>(ROR_D)) + ((ROR_A)<<((ROR_SZ)-(ROR_D)));\</span>
<a name="l00446"></a>00446 <span class="preprocessor"> }\</span>
<a name="l00447"></a>00447 <span class="preprocessor"> (ROR_A) &= (ROR_MSK);\</span>
<a name="l00448"></a>00448 <span class="preprocessor"> reg68.sr |= (((ROR_A)==0)<<SR_Z_BIT) | (((s32)(ROR_A)<0)<<SR_N_BIT);\</span>
<a name="l00449"></a>00449 <span class="preprocessor">}</span>
<a name="l00450"></a>00450 <span class="preprocessor"></span>
<a name="l00452"></a><a class="code" href="macro68_8h.html#9256b88e92d07a399381ca524df5ee31">00452</a> <span class="preprocessor">#define ROL(ROR_A,ROR_D,ROR_MSK,ROR_SZ) \</span>
<a name="l00453"></a>00453 <span class="preprocessor">{\</span>
<a name="l00454"></a>00454 <span class="preprocessor"> reg68.sr &= 0xFF00 | SR_X;\</span>
<a name="l00455"></a>00455 <span class="preprocessor"> if((ROR_D)!=0) \</span>
<a name="l00456"></a>00456 <span class="preprocessor"> {\</span>
<a name="l00457"></a>00457 <span class="preprocessor"> ADDCYCLE(2*(ROR_D));\</span>
<a name="l00458"></a>00458 <span class="preprocessor"> ROR_D &= (ROR_SZ)-1;\</span>
<a name="l00459"></a>00459 <span class="preprocessor"> if((ROR_A)&(1<<(32-(ROR_D)))) reg68.sr |= SR_C;\</span>
<a name="l00460"></a>00460 <span class="preprocessor"> (ROR_A) &= (ROR_MSK);\</span>
<a name="l00461"></a>00461 <span class="preprocessor"> (ROR_A) = ((ROR_A)<<(ROR_D)) + ((ROR_A)>>((ROR_SZ)-(ROR_D)));\</span>
<a name="l00462"></a>00462 <span class="preprocessor"> }\</span>
<a name="l00463"></a>00463 <span class="preprocessor"> (ROR_A) &= (ROR_MSK);\</span>
<a name="l00464"></a>00464 <span class="preprocessor"> reg68.sr |= (((ROR_A)==0)<<SR_Z_BIT) | (((s32)(ROR_A)<0)<<SR_N_BIT);\</span>
<a name="l00465"></a>00465 <span class="preprocessor">}</span>
<a name="l00466"></a>00466 <span class="preprocessor"></span>
<a name="l00467"></a><a class="code" href="macro68_8h.html#cfbef3b4e05471e05c4596d0aa54b384">00467</a> <span class="preprocessor">#define RORB(ROR_A,ROR_B) ROR(ROR_A,ROR_B,0xFF000000,8)</span>
<a name="l00468"></a><a class="code" href="macro68_8h.html#2c1f7cf90cc50e238686514c1d783be8">00468</a> <span class="preprocessor"></span><span class="preprocessor">#define RORW(ROR_A,ROR_B) ROR(ROR_A,ROR_B,0xFFFF0000,16)</span>
<a name="l00469"></a><a class="code" href="macro68_8h.html#2e740f350e0ba80253ff697d1b909565">00469</a> <span class="preprocessor"></span><span class="preprocessor">#define RORL(ROR_A,ROR_B) ROR(ROR_A,ROR_B,0xFFFFFFFF,32)</span>
<a name="l00470"></a><a class="code" href="macro68_8h.html#d4c0c47790b729de2c55e40f943ea7fb">00470</a> <span class="preprocessor"></span><span class="preprocessor">#define ROLB(ROR_A,ROR_B) ROL(ROR_A,ROR_B,0xFF000000,8)</span>
<a name="l00471"></a><a class="code" href="macro68_8h.html#7a7b5d18bb3967e9d43a983ba02cd0b0">00471</a> <span class="preprocessor"></span><span class="preprocessor">#define ROLW(ROR_A,ROR_B) ROL(ROR_A,ROR_B,0xFFFF0000,16)</span>
<a name="l00472"></a><a class="code" href="macro68_8h.html#e2c9f437b5dd44922be57fa9d4d510a6">00472</a> <span class="preprocessor"></span><span class="preprocessor">#define ROLL(ROR_A,ROR_B) ROL(ROR_A,ROR_B,0xFFFFFFFF,32)</span>
<a name="l00473"></a>00473 <span class="preprocessor"></span>
<a name="l00475"></a><a class="code" href="macro68_8h.html#c345ba876fb038f47a015001da1552f5">00475</a> <span class="preprocessor">#define ROXR(ROR_A,ROR_D,ROR_MSK,ROR_SZ) \</span>
<a name="l00476"></a>00476 <span class="preprocessor">{\</span>
<a name="l00477"></a>00477 <span class="preprocessor"> u32 ROR_X = (reg68.sr>>SR_X_BIT)&1;\</span>
<a name="l00478"></a>00478 <span class="preprocessor"> reg68.sr &= 0xFF00;\</span>
<a name="l00479"></a>00479 <span class="preprocessor"> if((ROR_D)!=0) \</span>
<a name="l00480"></a>00480 <span class="preprocessor"> {\</span>
<a name="l00481"></a>00481 <span class="preprocessor"> ADDCYCLE(2*(ROR_D));\</span>
<a name="l00482"></a>00482 <span class="preprocessor"> ROR_D &= (ROR_SZ)-1;\</span>
<a name="l00483"></a>00483 <span class="preprocessor"> if((ROR_A)&(1<<((ROR_D)-1+32-(ROR_SZ)))) reg68.sr |= SR_C | SR_X;\</span>
<a name="l00484"></a>00484 <span class="preprocessor"> (ROR_A) &= (ROR_MSK);\</span>
<a name="l00485"></a>00485 <span class="preprocessor"> (ROR_A) = ((ROR_A)>>(ROR_D)) + ((ROR_A)<<((ROR_SZ)-(ROR_D)+1));\</span>
<a name="l00486"></a>00486 <span class="preprocessor"> (ROR_A) |= (ROR_X)<<(32-(ROR_D));\</span>
<a name="l00487"></a>00487 <span class="preprocessor"> }\</span>
<a name="l00488"></a>00488 <span class="preprocessor"> (ROR_A) &= (ROR_MSK);\</span>
<a name="l00489"></a>00489 <span class="preprocessor"> reg68.sr |= (((ROR_A)==0)<<SR_Z_BIT) | (((s32)(ROR_A)<0)<<SR_N_BIT);\</span>
<a name="l00490"></a>00490 <span class="preprocessor">}</span>
<a name="l00491"></a>00491 <span class="preprocessor"></span>
<a name="l00493"></a><a class="code" href="macro68_8h.html#fc5f222e265883f0ef3153798efa2cce">00493</a> <span class="preprocessor">#define ROXL(ROR_A,ROR_D,ROR_MSK,ROR_SZ) \</span>
<a name="l00494"></a>00494 <span class="preprocessor">{\</span>
<a name="l00495"></a>00495 <span class="preprocessor"> u32 ROR_X = (reg68.sr>>SR_X_BIT)&1;\</span>
<a name="l00496"></a>00496 <span class="preprocessor"> reg68.sr &= 0xFF00;\</span>
<a name="l00497"></a>00497 <span class="preprocessor"> if((ROR_D)!=0) \</span>
<a name="l00498"></a>00498 <span class="preprocessor"> {\</span>
<a name="l00499"></a>00499 <span class="preprocessor"> ADDCYCLE(2*(ROR_D));\</span>
<a name="l00500"></a>00500 <span class="preprocessor"> ROR_D &= (ROR_SZ)-1;\</span>
<a name="l00501"></a>00501 <span class="preprocessor"> if((ROR_A)&(1<<(32-(ROR_D)))) reg68.sr |= SR_C | SR_X ;\</span>
<a name="l00502"></a>00502 <span class="preprocessor"> (ROR_A) &= (ROR_MSK);\</span>
<a name="l00503"></a>00503 <span class="preprocessor"> (ROR_A) = ((ROR_A)<<(ROR_D)) + ((ROR_A)>>((ROR_SZ)-(ROR_D)+1));\</span>
<a name="l00504"></a>00504 <span class="preprocessor"> (ROR_A) |= (ROR_X)<<((ROR_D)-1+(32-(ROR_SZ)));\</span>
<a name="l00505"></a>00505 <span class="preprocessor"> }\</span>
<a name="l00506"></a>00506 <span class="preprocessor"> (ROR_A) &= (ROR_MSK);\</span>
<a name="l00507"></a>00507 <span class="preprocessor"> reg68.sr |= (((ROR_A)==0)<<SR_Z_BIT) | (((s32)(ROR_A)<0)<<SR_N_BIT);\</span>
<a name="l00508"></a>00508 <span class="preprocessor">}</span>
<a name="l00509"></a>00509 <span class="preprocessor"></span>
<a name="l00510"></a><a class="code" href="macro68_8h.html#2cd8b05d04680b28e8a2270bdebb6605">00510</a> <span class="preprocessor">#define ROXRB(ROR_A,ROR_B) ROXR(ROR_A,ROR_B,0xFF000000,8)</span>
<a name="l00511"></a><a class="code" href="macro68_8h.html#7c418e09442d42c45b6862ecee08a7dc">00511</a> <span class="preprocessor"></span><span class="preprocessor">#define ROXRW(ROR_A,ROR_B) ROXR(ROR_A,ROR_B,0xFFFF0000,16)</span>
<a name="l00512"></a><a class="code" href="macro68_8h.html#7636eecc52eaa317970783b8ca5c5cf2">00512</a> <span class="preprocessor"></span><span class="preprocessor">#define ROXRL(ROR_A,ROR_B) ROXR(ROR_A,ROR_B,0xFFFFFFFF,32)</span>
<a name="l00513"></a><a class="code" href="macro68_8h.html#7bcc76eb72635990f7d4bee3ce228527">00513</a> <span class="preprocessor"></span><span class="preprocessor">#define ROXLB(ROR_A,ROR_B) ROXL(ROR_A,ROR_B,0xFF000000,8)</span>
<a name="l00514"></a><a class="code" href="macro68_8h.html#f1d291e1d8ddf7df1429b9e96a79a003">00514</a> <span class="preprocessor"></span><span class="preprocessor">#define ROXLW(ROR_A,ROR_B) ROXL(ROR_A,ROR_B,0xFFFF0000,16)</span>
<a name="l00515"></a><a class="code" href="macro68_8h.html#8ea628cee254d03d08e2bc9e2d0ab159">00515</a> <span class="preprocessor"></span><span class="preprocessor">#define ROXLL(ROR_A,ROR_B) ROXL(ROR_A,ROR_B,0xFFFFFFFF,32)</span>
<a name="l00516"></a>00516 <span class="preprocessor"></span>
<a name="l00519"></a>00519 <span class="preprocessor">#ifdef __cplusplus</span>
<a name="l00520"></a>00520 <span class="preprocessor"></span>}
<a name="l00521"></a>00521 <span class="preprocessor">#endif</span>
<a name="l00522"></a>00522 <span class="preprocessor"></span>
<a name="l00523"></a>00523 <span class="preprocessor">#endif </span><span class="comment">/* #ifndef _MACRO68_H_ */</span>
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