<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
<html><head><meta http-equiv="Content-Type" content="text/html;charset=UTF-8">
<title>sc68fordevelopers: /home/mandrake/rpm/BUILD/sc68-2.2.1/emu68/srdef68.h File Reference</title>
<link href="tabs.css" rel="stylesheet" type="text/css">
<link href="doxygen.css" rel="stylesheet" type="text/css">
</head><body>
<!-- Generated by Doxygen 1.5.9 -->
<div class="navigation" id="top">
<div class="tabs">
<ul>
<li><a href="index.html"><span>Main Page</span></a></li>
<li><a href="pages.html"><span>Related Pages</span></a></li>
<li><a href="modules.html"><span>Modules</span></a></li>
<li><a href="annotated.html"><span>Data Structures</span></a></li>
<li class="current"><a href="files.html"><span>Files</span></a></li>
</ul>
</div>
<div class="tabs">
<ul>
<li><a href="files.html"><span>File List</span></a></li>
<li><a href="globals.html"><span>Globals</span></a></li>
</ul>
</div>
</div>
<div class="contents">
<h1>/home/mandrake/rpm/BUILD/sc68-2.2.1/emu68/srdef68.h File Reference</h1>Status Register (SR) definitions.
<a href="#_details">More...</a>
<p>
<p>
<a href="srdef68_8h_source.html">Go to the source code of this file.</a><table border="0" cellpadding="0" cellspacing="0">
<tr><td></td></tr>
<tr><td colspan="2"><br><h2>Defines</h2></td></tr>
<tr><td colspan="2"><div class="groupHeader">SR bit definitions.</div></td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="faef1e5c3e531ff59980e95fb931733c"></a><!-- doxytag: member="srdef68.h::SR_C_BIT" ref="faef1e5c3e531ff59980e95fb931733c" args="" -->
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="srdef68_8h.html#faef1e5c3e531ff59980e95fb931733c">SR_C_BIT</a> 0</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Carry bit number. <br></td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="9050773a31218399e7a5beddf780ecef"></a><!-- doxytag: member="srdef68.h::SR_V_BIT" ref="9050773a31218399e7a5beddf780ecef" args="" -->
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="srdef68_8h.html#9050773a31218399e7a5beddf780ecef">SR_V_BIT</a> 1</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Overflow bit number. <br></td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="61358487950b723851177611ac385abf"></a><!-- doxytag: member="srdef68.h::SR_Z_BIT" ref="61358487950b723851177611ac385abf" args="" -->
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="srdef68_8h.html#61358487950b723851177611ac385abf">SR_Z_BIT</a> 2</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Zero bit number. <br></td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="5af5c659d4673612805983337d980478"></a><!-- doxytag: member="srdef68.h::SR_N_BIT" ref="5af5c659d4673612805983337d980478" args="" -->
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="srdef68_8h.html#5af5c659d4673612805983337d980478">SR_N_BIT</a> 3</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Negative bit number. <br></td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="1bdabe3e9a0a2adffdce5ab1b48c8e30"></a><!-- doxytag: member="srdef68.h::SR_X_BIT" ref="1bdabe3e9a0a2adffdce5ab1b48c8e30" args="" -->
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="srdef68_8h.html#1bdabe3e9a0a2adffdce5ab1b48c8e30">SR_X_BIT</a> 4</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">eXtended carry bit number <br></td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="f45c0fa5f0bf8aebf64fc0f31b18b72e"></a><!-- doxytag: member="srdef68.h::SR_IPL_BIT" ref="f45c0fa5f0bf8aebf64fc0f31b18b72e" args="" -->
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="srdef68_8h.html#f45c0fa5f0bf8aebf64fc0f31b18b72e">SR_IPL_BIT</a> 8</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Internal Processor Level bit number. <br></td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="618d3f5a47acade0be40ab62b5051841"></a><!-- doxytag: member="srdef68.h::SR_S_BIT" ref="618d3f5a47acade0be40ab62b5051841" args="" -->
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="srdef68_8h.html#618d3f5a47acade0be40ab62b5051841">SR_S_BIT</a> 13</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Superuser bit number. <br></td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="b901b29b14681b4131746c34685146f1"></a><!-- doxytag: member="srdef68.h::SR_T_BIT" ref="b901b29b14681b4131746c34685146f1" args="" -->
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="srdef68_8h.html#b901b29b14681b4131746c34685146f1">SR_T_BIT</a> 15</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Trace bit number. <br></td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ab737dff2860e37fbd9e08c30eaa0364"></a><!-- doxytag: member="srdef68.h::SR_C" ref="ab737dff2860e37fbd9e08c30eaa0364" args="" -->
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="srdef68_8h.html#ab737dff2860e37fbd9e08c30eaa0364">SR_C</a> (1<<SR_C_BIT)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Carry value. <br></td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="e147775240980f758cd0152a625724fe"></a><!-- doxytag: member="srdef68.h::SR_V" ref="e147775240980f758cd0152a625724fe" args="" -->
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="srdef68_8h.html#e147775240980f758cd0152a625724fe">SR_V</a> (1<<SR_V_BIT)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Overflow value. <br></td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="7847483f951ee91343d93a74fffb13dd"></a><!-- doxytag: member="srdef68.h::SR_Z" ref="7847483f951ee91343d93a74fffb13dd" args="" -->
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="srdef68_8h.html#7847483f951ee91343d93a74fffb13dd">SR_Z</a> (1<<SR_Z_BIT)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Zero value. <br></td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="4e20b1ac95c6469063cd85ff839c6c01"></a><!-- doxytag: member="srdef68.h::SR_N" ref="4e20b1ac95c6469063cd85ff839c6c01" args="" -->
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="srdef68_8h.html#4e20b1ac95c6469063cd85ff839c6c01">SR_N</a> (1<<SR_N_BIT)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Negative value. <br></td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="2037ff64b19633dfd3b54da9d05784d9"></a><!-- doxytag: member="srdef68.h::SR_X" ref="2037ff64b19633dfd3b54da9d05784d9" args="" -->
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="srdef68_8h.html#2037ff64b19633dfd3b54da9d05784d9">SR_X</a> (1<<SR_X_BIT)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">eXtended carry value <br></td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="f33871a17a312e5398fbd0b040d4337e"></a><!-- doxytag: member="srdef68.h::SR_S" ref="f33871a17a312e5398fbd0b040d4337e" args="" -->
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="srdef68_8h.html#f33871a17a312e5398fbd0b040d4337e">SR_S</a> (1<<SR_S_BIT)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Superuser value. <br></td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="0e909b939c197ac3079565360f1ecbfb"></a><!-- doxytag: member="srdef68.h::SR_T" ref="0e909b939c197ac3079565360f1ecbfb" args="" -->
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="srdef68_8h.html#0e909b939c197ac3079565360f1ecbfb">SR_T</a> (1<<SR_T_BIT)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Trace value. <br></td></tr>
<tr><td colspan="2"><div class="groupHeader">Condition tests.</div></td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="254f9ee3d77bc5b1347b286848640a18"></a><!-- doxytag: member="srdef68.h::IS_CS" ref="254f9ee3d77bc5b1347b286848640a18" args="(sr)" -->
#define </td><td class="memItemRight" valign="bottom"><b>IS_CS</b>(sr) ((sr)&SR_C)</td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="b6b0bacfb62fae377f05cb93c9ba5a17"></a><!-- doxytag: member="srdef68.h::IS_CC" ref="b6b0bacfb62fae377f05cb93c9ba5a17" args="(sr)" -->
#define </td><td class="memItemRight" valign="bottom"><b>IS_CC</b>(sr) (!IS_CS(sr))</td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="225dda6ef2884cd97ffad372bd0f7993"></a><!-- doxytag: member="srdef68.h::IS_EQ" ref="225dda6ef2884cd97ffad372bd0f7993" args="(sr)" -->
#define </td><td class="memItemRight" valign="bottom"><b>IS_EQ</b>(sr) ((sr)&SR_Z)</td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a1b37ec87ba47885152b6e362468f419"></a><!-- doxytag: member="srdef68.h::IS_NE" ref="a1b37ec87ba47885152b6e362468f419" args="(sr)" -->
#define </td><td class="memItemRight" valign="bottom"><b>IS_NE</b>(sr) (!IS_EQ(sr))</td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="abebff1159cb88e07a36db55b74cd580"></a><!-- doxytag: member="srdef68.h::IS_VS" ref="abebff1159cb88e07a36db55b74cd580" args="(sr)" -->
#define </td><td class="memItemRight" valign="bottom"><b>IS_VS</b>(sr) ((sr)&SR_V)</td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="7e2aba58417ea53fb329c4004b977629"></a><!-- doxytag: member="srdef68.h::IS_VC" ref="7e2aba58417ea53fb329c4004b977629" args="(sr)" -->
#define </td><td class="memItemRight" valign="bottom"><b>IS_VC</b>(sr) (!IS_VS(sr))</td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="bf2c7213c64e41754f9bfc8c059d601f"></a><!-- doxytag: member="srdef68.h::IS_MI" ref="bf2c7213c64e41754f9bfc8c059d601f" args="(sr)" -->
#define </td><td class="memItemRight" valign="bottom"><b>IS_MI</b>(sr) ((sr)&SR_N)</td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="7fbb16de001f1ca3f2253f9285677527"></a><!-- doxytag: member="srdef68.h::IS_PL" ref="7fbb16de001f1ca3f2253f9285677527" args="(sr)" -->
#define </td><td class="memItemRight" valign="bottom"><b>IS_PL</b>(sr) (!IS_MI(sr))</td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="e9063fa63e47f08dc651e56becec86a2"></a><!-- doxytag: member="srdef68.h::IS_LS" ref="e9063fa63e47f08dc651e56becec86a2" args="(sr)" -->
#define </td><td class="memItemRight" valign="bottom"><b>IS_LS</b>(sr) ((sr)&(SR_C|SR_Z))</td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="b7b018048abb7a498c17b8dce189a982"></a><!-- doxytag: member="srdef68.h::IS_LT" ref="b7b018048abb7a498c17b8dce189a982" args="(sr)" -->
#define </td><td class="memItemRight" valign="bottom"><b>IS_LT</b>(sr) (((sr)^((sr)>>2))&SR_V)</td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="7bd6d8b97a75324a2648728a23269bef"></a><!-- doxytag: member="srdef68.h::IS_LE" ref="7bd6d8b97a75324a2648728a23269bef" args="(sr)" -->
#define </td><td class="memItemRight" valign="bottom"><b>IS_LE</b>(sr) (IS_LT(sr)|IS_EQ(sr))</td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="5a5e814d2715d73cf6b5d7f527f0f006"></a><!-- doxytag: member="srdef68.h::IS_GE" ref="5a5e814d2715d73cf6b5d7f527f0f006" args="(sr)" -->
#define </td><td class="memItemRight" valign="bottom"><b>IS_GE</b>(sr) (!IS_LT(sr))</td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="d400f5121188fe0f73a8afce8e328988"></a><!-- doxytag: member="srdef68.h::IS_GT" ref="d400f5121188fe0f73a8afce8e328988" args="(sr)" -->
#define </td><td class="memItemRight" valign="bottom"><b>IS_GT</b>(sr) (!IS_LE(sr))</td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="57fd170ad20b9f479bc1047f0861f8c8"></a><!-- doxytag: member="srdef68.h::IS_HI" ref="57fd170ad20b9f479bc1047f0861f8c8" args="(sr)" -->
#define </td><td class="memItemRight" valign="bottom"><b>IS_HI</b>(sr) (!IS_LS(sr))</td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="f5221fdc3016152874da58d6f36673ba"></a><!-- doxytag: member="srdef68.h::IS_T" ref="f5221fdc3016152874da58d6f36673ba" args="(sr)" -->
#define </td><td class="memItemRight" valign="bottom"><b>IS_T</b>(sr) 1</td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="772f30fc7a8aa269e8ac3fb023169b04"></a><!-- doxytag: member="srdef68.h::IS_F" ref="772f30fc7a8aa269e8ac3fb023169b04" args="(sr)" -->
#define </td><td class="memItemRight" valign="bottom"><b>IS_F</b>(sr) 0</td></tr>
<tr><td colspan="2"><div class="groupHeader">SR manipulations.</div></td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="srdef68_8h.html#85034caa22886e907a94809abd7c1ee1">MOVESR</a>(SR, SRC)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Set SR Z and N bit for SRC value. <a href="#85034caa22886e907a94809abd7c1ee1"></a><br></td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a9c98429495e3075d19ef2767dbb42b3"></a><!-- doxytag: member="srdef68.h::GET_CCR" ref="a9c98429495e3075d19ef2767dbb42b3" args="(SR)" -->
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="srdef68_8h.html#a9c98429495e3075d19ef2767dbb42b3">GET_CCR</a>(SR) ((<a class="el" href="type68_8h.html#ed742c436da53c1080638ce6ef7d13de">u8</a>)(SR))</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Get CCR value. <br></td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="43fc9c96d522d8a98157bf82da066831"></a><!-- doxytag: member="srdef68.h::SET_CCR" ref="43fc9c96d522d8a98157bf82da066831" args="(SR, CCR)" -->
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="srdef68_8h.html#43fc9c96d522d8a98157bf82da066831">SET_CCR</a>(SR, CCR) (SR) = (((SR)&0xFF00) | (CCR))</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Set CCR in SR value. <br></td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="45cb3c873930571980710e0d53b3e5c8"></a><!-- doxytag: member="srdef68.h::GET_IPL" ref="45cb3c873930571980710e0d53b3e5c8" args="(n)" -->
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="srdef68_8h.html#45cb3c873930571980710e0d53b3e5c8">GET_IPL</a>(n) (((n)>>SR_IPL)&7)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Get IPL in SR value. <br></td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="cf9d68318cfd9455f1561e69e57079fc"></a><!-- doxytag: member="srdef68.h::SET_IPL" ref="cf9d68318cfd9455f1561e69e57079fc" args="(sr, n)" -->
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="srdef68_8h.html#cf9d68318cfd9455f1561e69e57079fc">SET_IPL</a>(sr, n) (sr) = (((sr)&(7<<SR_IPL_BIT)) | ((n)<<SR_IPL_BIT)))</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Change IPL for SR value. <br></td></tr>
</table>
<hr><h2>Detailed Description</h2>
Status Register (SR) definitions.
<p>
<dl class="author" compact><dt><b>Author:</b></dt><dd>Ben(jamin) Gerard <<a href="mailto:ben@sashipa.com">ben@sashipa.com</a>> </dd></dl>
<dl class="date" compact><dt><b>Date:</b></dt><dd>1999/13/03 </dd></dl>
<dl class="version" compact><dt><b>Version:</b></dt><dd></dd></dl>
<dl class="rcs" compact><dt><b>Id</b></dt><dd><a class="el" href="srdef68_8h.html" title="Status Register (SR) definitions.">srdef68.h</a>,v 2.1 2003/09/30 06:29:57 benjihan Exp </dd></dl>
<p>
68K status register include condition code register (CCR) located in the LSB of SR, and privileged processor status in MSB. EMU68 does not currently handle supervisor and trace mode. Internal processor level is partially managed. Each SR bit is defined by its bit number (SR_x_BIT) and the corresponding value (SR_x) where x is one of C,V,Z,N,X,S or T. SR_IPL_BIT is used to locate the less significant bit position of the 3 IPL bits. Macros are available to help SR bit manipulations. <hr><h2>Define Documentation</h2>
<a class="anchor" name="85034caa22886e907a94809abd7c1ee1"></a><!-- doxytag: member="srdef68.h::MOVESR" ref="85034caa22886e907a94809abd7c1ee1" args="(SR, SRC)" -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname">#define MOVESR </td>
<td>(</td>
<td class="paramtype">SR, <tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">SRC </td>
<td class="paramname"> </td>
<td> ) </td>
<td></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>
<b>Value:</b><div class="fragment"><pre class="fragment">(SR) = \
( ((SR)&~(<a class="code" href="srdef68_8h.html#7847483f951ee91343d93a74fffb13dd" title="Zero value.">SR_Z</a>|<a class="code" href="srdef68_8h.html#4e20b1ac95c6469063cd85ff839c6c01" title="Negative value.">SR_N</a>|<a class="code" href="srdef68_8h.html#e147775240980f758cd0152a625724fe" title="Overflow value.">SR_V</a>|<a class="code" href="srdef68_8h.html#ab737dff2860e37fbd9e08c30eaa0364" title="Carry value.">SR_C</a>)) | \
(((SRC)==0)<<<a class="code" href="srdef68_8h.html#61358487950b723851177611ac385abf" title="Zero bit number.">SR_Z_BIT</a> ) | (( (SRC)<0)<<<a class="code" href="srdef68_8h.html#5af5c659d4673612805983337d980478" title="Negative bit number.">SR_N_BIT</a> ) )
</pre></div>Set SR Z and N bit for SRC value.
<p>
</div>
</div><p>
</div>
<hr size="1"><address style="text-align: right;"><small>Generated on Tue Sep 15 03:58:05 2009 for sc68fordevelopers by
<a href="http://www.doxygen.org/index.html">
<img src="doxygen.png" alt="doxygen" align="middle" border="0"></a> 1.5.9 </small></address>
</body>
</html>
distrib
>
Mandriva
>
2010.0
>
i586
>
media
>
contrib-release
>
by-pkgid
>
2ff8806b45ba9c96e77e01e6d40e440b
>
files
>
202
